Several headers and jumpers have been exposed for development purposes. A
header has been provided to access UART0 on the LPC1769 - this can be used for
serial debug as well as ISP programming. The
standard JTAG interface has also been exposed
through a 10-pin ARM JTAG Mini connector. Two buttons have also been added to
the board - one resets the LPC1769, and the other allows the LPC1769 to enter a
USB bootloader if available.
Parts Layout
- S1 (RESET) - Pressing this button will reset the LPC1769 (it will not reset
the RN-41 chipset)
- S2 (PROG) - This button engages a USB Bootloader. Hold down S2 while pressing
S1 to enter the bootloader.
Headers and jumpers
- JP1 (HOST PWR) - Shorting this jumper will allow the board to either charge an
upstream USB device, or be powered by it.
- JP2 (ISP_EN) - Shorting this jumper will place the LPC1769 in ISP Bootloader
mode when it is reset. In ISP Bootloader mode, user code is not run - J3 can
only be used to deploy firmware over serial.
- J3 (ISP) - The debug serial port (UART0) which can also be used for ISP
programming (see JP2).
- J5 (JTAG) - This is a 50 mil pitch 10-pin ARM Mini JTAG interface. An adapter
can be used to connect the standard 100 mil 20-pin JTAG connector.
Solder Jumpers
- SJ1, SJ2 - These are used to engage the 120 ohm termination resistor for CAN
interfaces A and B respectively. If being used in a test bench without a full
CAN network, you probably want these enabled. It may be simpler and more
reversible to add the resistors to the OBD-II cable, instead. Note: The
current version has an error in the design and this functionality is reversed - the
resistors are enabled by default, and are disabled with the solder jumper. The
termiation resistance should be left to the vehicle’s bus in normal operation
- SJ3, SJ4 - These switch the CAN B channel between the Diagnostic Medium Speed
and Multimedia CAN buses exposed by the OBD-II connector on Ford vehicles.
They are each shorted towards the PCB edge, enabling the Diagnostic interface
by default.
- SJ5 - This connects the DTR line of the ISP header (J3) to the LPC1769 RESET
line. This can be used by an ISP programmer to automatically reset the LPC1769
for programming. In practice, this can accidentally hold the LPC1769 in
reset, so this jumper should be OPENED if J3 is used.
- SJ6 - This disconnects the RN-41 reset pin from the BT_RST GPIO pin on the
LPC1769. This is normally closed, and should only be opened if the RN-41 needs
to be put into reset without the LPC1769.
GPIO Pin List
A list of GPIO pins used on the LPC1769
Port 0
- P0.2 - ISP/Debug UART: TX
- P0.3 - ISP/Debug UART: RX
- P0.4 - CAN Channel B: RX
- P0.5 - CAN Channel B: TX
- P0.6 - CAN Channel B: Enable (HIGH = Normal Mode, LOW = Standby Mode)
- P0.15 - Bluetooth UART: RX
- P0.16 - Bluetooth UART: TX
- P0.17 - Bluetooth Enable: (HIGH = RN-41 is enabled, LOW = RN-41 is in RESET)
- P0.18 - Bluetooth Connection: INPUT - Will go high when bluetooth host is
connected
- P0.19 - CAN Channel A: Enable (HIGH = Normal Mode, LOW = Standby Mode)
- P0.21 - CAN Channel A: RX
- P0.22 - CAN Channel A: TX
- P0.29 - USB D+
- P0.30 - USB D-
Port 1
- P1.18 - LED4 (Right LED) Green Channel
- P1.20 - LED4 (Right LED) Blue Channel
- P1.21 - LED4 (Right LED) Red Channel
- P1.23 - LED1 (Left LED) Green Channel
- P1.24 - LED1 (Left LED) Blue Channel
- P1.26 - LED1 (Left LED) Red Channel
- P1.30 - USB VBUS: Connected to USB +5V pin
Port 2
- P2.2 - Bluetooth UART: RTS (LOW when RN-41 is ready for data, HIGH when RN-41
serial buffer is full)
- P2.7 - Bluetooth UART: CTS (LOW when LPC1769 is ready for data, HIGH when
LPC1769 serial buffer is full)
- P2.9 - USB CONNECT: Enables USB Pullup (LOW when USB unused, HIGH to signal
USB interface is ready)
- P2.10 - ISP ENABLE: When HIGH, User code runs on next RESET. When LOW, ISP
Serial bootloader runs on next RESET.
- P2.12 - USB Bootloader ENABLE: When HIGH, User code runs on next RESET. When
LOW, USB bootloader runs on next RESET
- P2.13 - Power output enable (Active Low): Output power port enabled when LOW
VI Reference Design